Avr
Avr
The now highly popular AVR CPU chip architecture was developed in Norway by two students working on a project. When they sold their own designs to Atmel, the technology was further developed to become the popular and ever increasingly developed standard that it is today. It struck a chord in the computing world because it led the way with the usage of flash memory on the chip itself, as opposed to other standards that were common across the industry such as ROM and EPROM. The benefits of the flash storage for programs meant that there was no need for external memory. The 8-bit RISC (reduced instruction set computer) single chip micro controller is based on the principal that less is often better. Simple instructions can replace long and complicated algorithms and still provide the higher level of performance due to speed. The ability to process simpler commands should allow for processes to be executed much more quickly and efficiently. The AVR architecture allowed for the execution of programs in a non-volatile flash memory format. Efficiency is still the keyword of the development of AVR. Being so popular, the AVR architecture continues to be developed, as there are many resources available for doing so. Development boards and software are easily available as well as being priced within a reasonable range. The data RAM of the AVR architecture allowed for the Flash, EEPROM (Electrically Erasable Programmable Read Only Memory) and SRAM (Static Random Access Memory) forms of memory storage to be incorporated together on one chip. This was a factor that eliminated the need for any external memory, but there is still the capability to add extra memory with the buses of any external devices. The program memory is self contained, as all executable code driven by the AVR architecture has to be done within the flash memory of the chip, as there is no off-chip program memory. AVR micro controllers use EEPROM for the storage of data that is only semi-permanent. Both Flash and EEPROM can maintain and store data even if the system loses power. Combined with the AVR architecture, the access time of EEPROM is sped up greatly and information should only be written if some instruction or data needs to be altered. The speed of AVR’s are one of the most impressive factors, as when it executes a program, it does so in a dual stage process. As one instruction is being executed, the next one is already being obtained. The clock speed of the AVR MCU’s is stated as being 0-20 MHz with some configurations and devices reaching higher than that.